Covered
- Integration questions about the licensed revision: interfaces, memory map, reset, timing constraints and the supplied scripts.
- Reproducing a reported problem against the delivered RTL and verification collateral.
- Fixes for confirmed defects in the licensed revision, published in the errata log and sent to licensees.
- Updated verification collateral when a defect or a clarified contract changes expected results.
Not covered
- Debugging customer logic beyond the IP boundary.
- Foundry sign-off, DFT insertion, SRAM macro selection and physical design of the customer chip.
- New features or configurations; these are scoped and quoted as engineering work.
Response targets
| Request | First response (target) | Next step (target) |
|---|---|---|
| Evaluation question (no agreement) | 5 business days | Best effort |
| Project license: question | 2 business days | Answer or a dated plan |
| Project license: defect that blocks integration or gives wrong results (S1) | 1 business day | Workaround or fix plan within 5 business days |
| Project license: defect with a workaround (S2) | 2 business days | Fix in the next revision |
| Documentation problem (S3) | 5 business days | Corrected in the next documentation update |
Business days are working days in Korea (KST). These are targets for licensed revisions, not measured performance.
How to reach us
Use the inquiry form on the home page. Each request returns a receipt ID; quote it in follow-ups. A project license names a technical contact and an issue channel. During evaluation, include the Forge kit hash (SHA256SUMS) or the evidence file you are asking about.
Errata and releases
Each confirmed defect is entered in the errata log with an ID, the affected revisions, a workaround and a status. Release notes list every published change.