OpenSTA 3.1.0 b3e1b39898 Copyright (c) 2026, Parallax Software, Inc. License GPLv3: GNU GPL version 3 This is free software, and you are free to change and redistribute it under certain conditions; type `show_copying' for details. This program comes with ABSOLUTELY NO WARRANTY; for details type `show_warranty'. Warning 441: constraints.sdc line 4, set_input_delay relative to a clock defined on the same port/pin not allowed. Warning 441: constraints.sdc line 5, set_input_delay relative to a clock defined on the same port/pin not allowed. time 1ns capacitance 1fF resistance 1kohm voltage 1v current 1mA power 1nW distance 1um CHECK_SETUP_BEGIN CHECK_SETUP_END Startpoint: _19330_ (rising edge-triggered flip-flop clocked by core) Endpoint: _19469_ (rising edge-triggered flip-flop clocked by core) Path Group: core Path Type: max Delay Time Description ------------------------------------------------------------- 0.0000 0.0000 clock core (rise edge) 0.0000 0.0000 clock network delay (ideal) 0.0000 0.0000 ^ _19330_/CK (DFFR_X1) 0.1023 0.1023 v _19330_/Q (DFFR_X1) 0.7378 0.8400 ^ _10895_/ZN (NOR2_X1) 0.9920 1.8320 v _10928_/ZN (NOR3_X1) 0.2040 2.0360 ^ _13645_/ZN (AOI222_X1) 0.0301 2.0661 v _13646_/ZN (NAND2_X1) 0.0390 2.1050 ^ _13655_/ZN (NOR2_X1) 0.5380 2.6430 ^ _13666_/ZN (AND2_X1) 0.0357 2.6788 v _15121_/ZN (AOI22_X1) 0.0419 2.7207 ^ _15122_/ZN (NAND2_X1) 0.0169 2.7376 v _15126_/ZN (AOI221_X1) 0.0559 2.7935 ^ _15127_/ZN (NAND4_X1) 0.0180 2.8115 v _15129_/ZN (AOI221_X1) 0.0835 2.8949 ^ _15140_/ZN (OAI221_X1) 0.0235 2.9184 v _15141_/ZN (AOI21_X1) 0.0476 2.9660 ^ _15143_/ZN (XNOR2_X1) 0.0347 3.0007 ^ _15144_/ZN (OR2_X1) 0.0172 3.0178 v _15192_/ZN (AOI21_X1) 0.0485 3.0663 ^ _15197_/ZN (AOI21_X1) 0.0222 3.0885 v _15243_/ZN (AOI21_X1) 0.0431 3.1315 ^ _15244_/ZN (OAI21_X1) 0.0219 3.1535 v _15245_/ZN (OAI21_X1) 0.0287 3.1822 ^ _15246_/ZN (INV_X1) 0.0000 3.1822 ^ _19469_/D (DFFR_X1) 3.1822 data arrival time 4.0000 4.0000 clock core (rise edge) 0.0000 4.0000 clock network delay (ideal) -0.0500 3.9500 clock uncertainty 0.0000 3.9500 clock reconvergence pessimism 3.9500 ^ _19469_/CK (DFFR_X1) -0.0312 3.9188 library setup time 3.9188 data required time ------------------------------------------------------------- 3.9188 data required time -3.1822 data arrival time ------------------------------------------------------------- 0.7366 slack (MET) Startpoint: _19330_ (rising edge-triggered flip-flop clocked by core) Endpoint: _19489_ (rising edge-triggered flip-flop clocked by core) Path Group: core Path Type: max Delay Time Description ------------------------------------------------------------- 0.0000 0.0000 clock core (rise edge) 0.0000 0.0000 clock network delay (ideal) 0.0000 0.0000 ^ _19330_/CK (DFFR_X1) 0.1023 0.1023 v _19330_/Q (DFFR_X1) 0.7378 0.8400 ^ _10895_/ZN (NOR2_X1) 0.9920 1.8320 v _10928_/ZN (NOR3_X1) 0.2040 2.0360 ^ _13645_/ZN (AOI222_X1) 0.0301 2.0661 v _13646_/ZN (NAND2_X1) 0.0390 2.1050 ^ _13655_/ZN (NOR2_X1) 0.5169 2.6219 ^ _13676_/ZN (AND2_X1) 0.0578 2.6798 v _15891_/ZN (AOI222_X1) 0.0385 2.7182 ^ _15895_/ZN (NAND2_X1) 0.0174 2.7356 v _15896_/ZN (AOI221_X1) 0.0391 2.7747 ^ _15899_/ZN (NAND3_X1) 0.0178 2.7925 v _15900_/ZN (AOI221_X1) 0.0538 2.8464 ^ _15901_/ZN (NOR2_X1) 0.0164 2.8628 v _15912_/ZN (AOI21_X1) 0.0389 2.9016 ^ _15934_/ZN (OAI211_X1) 0.0487 2.9503 ^ _15935_/ZN (XNOR2_X1) 0.0403 2.9906 ^ _15936_/ZN (AND2_X1) 0.0162 3.0068 v _15940_/ZN (AOI21_X1) 0.0435 3.0503 ^ _15990_/ZN (OAI21_X1) 0.0218 3.0721 v _16039_/ZN (OAI21_X1) 0.0599 3.1320 ^ _16040_/ZN (AOI21_X1) 0.0155 3.1476 v _16041_/ZN (AOI21_X1) 0.0000 3.1476 v _19489_/D (DFFR_X1) 3.1476 data arrival time 4.0000 4.0000 clock core (rise edge) 0.0000 4.0000 clock network delay (ideal) -0.0500 3.9500 clock uncertainty 0.0000 3.9500 clock reconvergence pessimism 3.9500 ^ _19489_/CK (DFFR_X1) -0.0456 3.9044 library setup time 3.9044 data required time ------------------------------------------------------------- 3.9044 data required time -3.1476 data arrival time ------------------------------------------------------------- 0.7568 slack (MET) Startpoint: _19330_ (rising edge-triggered flip-flop clocked by core) Endpoint: _19485_ (rising edge-triggered flip-flop clocked by core) Path Group: core Path Type: max Delay Time Description ------------------------------------------------------------- 0.0000 0.0000 clock core (rise edge) 0.0000 0.0000 clock network delay (ideal) 0.0000 0.0000 ^ _19330_/CK (DFFR_X1) 0.1023 0.1023 v _19330_/Q (DFFR_X1) 0.7378 0.8400 ^ _10895_/ZN (NOR2_X1) 0.9920 1.8320 v _10928_/ZN (NOR3_X1) 0.2040 2.0360 ^ _13645_/ZN (AOI222_X1) 0.0301 2.0661 v _13646_/ZN (NAND2_X1) 0.0546 2.1207 ^ _13651_/ZN (AOI21_X1) 0.5497 2.6704 ^ _13654_/ZN (AND2_X1) 0.0346 2.7051 v _15719_/ZN (AOI222_X1) 0.0460 2.7511 ^ _15721_/ZN (NAND3_X1) 0.0167 2.7678 v _15722_/ZN (AOI21_X1) 0.0514 2.8191 ^ _15723_/ZN (NAND4_X1) 0.0176 2.8367 v _15724_/ZN (AOI221_X1) 0.0785 2.9152 ^ _15736_/ZN (OAI211_X1) 0.0319 2.9471 v _15739_/ZN (XNOR2_X1) 0.0277 2.9749 ^ _15740_/ZN (NAND2_X1) 0.0187 2.9936 v _15788_/ZN (AOI21_X1) 0.0453 3.0388 ^ _15793_/ZN (AOI21_X1) 0.0215 3.0603 v _15840_/ZN (AOI21_X1) 0.0431 3.1034 ^ _15842_/ZN (OAI21_X1) 0.0219 3.1253 v _15843_/ZN (OAI21_X1) 0.0287 3.1540 ^ _15844_/ZN (INV_X1) 0.0000 3.1540 ^ _19485_/D (DFFR_X1) 3.1540 data arrival time 4.0000 4.0000 clock core (rise edge) 0.0000 4.0000 clock network delay (ideal) -0.0500 3.9500 clock uncertainty 0.0000 3.9500 clock reconvergence pessimism 3.9500 ^ _19485_/CK (DFFR_X1) -0.0312 3.9188 library setup time 3.9188 data required time ------------------------------------------------------------- 3.9188 data required time -3.1540 data arrival time ------------------------------------------------------------- 0.7648 slack (MET) Startpoint: _19330_ (rising edge-triggered flip-flop clocked by core) Endpoint: _19463_ (rising edge-triggered flip-flop clocked by core) Path Group: core Path Type: max Delay Time Description ------------------------------------------------------------- 0.0000 0.0000 clock core (rise edge) 0.0000 0.0000 clock network delay (ideal) 0.0000 0.0000 ^ _19330_/CK (DFFR_X1) 0.1023 0.1023 v _19330_/Q (DFFR_X1) 0.7378 0.8400 ^ _10895_/ZN (NOR2_X1) 0.9920 1.8320 v _10928_/ZN (NOR3_X1) 0.2040 2.0360 ^ _13645_/ZN (AOI222_X1) 0.0301 2.0661 v _13646_/ZN (NAND2_X1) 0.0546 2.1207 ^ _13651_/ZN (AOI21_X1) 0.5313 2.6520 ^ _13669_/ZN (AND2_X1) 0.0579 2.7099 v _14972_/ZN (AOI222_X1) 0.0452 2.7551 ^ _14973_/ZN (NAND2_X1) 0.0174 2.7725 v _14974_/ZN (AOI221_X1) 0.0390 2.8116 ^ _14977_/ZN (NAND3_X1) 0.0175 2.8291 v _14978_/ZN (AOI221_X1) 0.0831 2.9122 ^ _14989_/ZN (OAI221_X1) 0.0247 2.9368 v _14990_/ZN (AOI21_X1) 0.0536 2.9905 v _14991_/ZN (XNOR2_X1) 0.0799 3.0704 v _14994_/ZN (OR3_X1) 0.0306 3.1010 v _14995_/ZN (AND2_X1) 0.0546 3.1556 v _14996_/Z (MUX2_X1) 0.0000 3.1556 v _19463_/D (DFFR_X1) 3.1556 data arrival time 4.0000 4.0000 clock core (rise edge) 0.0000 4.0000 clock network delay (ideal) -0.0500 3.9500 clock uncertainty 0.0000 3.9500 clock reconvergence pessimism 3.9500 ^ _19463_/CK (DFFR_X1) -0.0292 3.9208 library setup time 3.9208 data required time ------------------------------------------------------------- 3.9208 data required time -3.1556 data arrival time ------------------------------------------------------------- 0.7651 slack (MET) Startpoint: _19330_ (rising edge-triggered flip-flop clocked by core) Endpoint: _19464_ (rising edge-triggered flip-flop clocked by core) Path Group: core Path Type: max Delay Time Description ------------------------------------------------------------- 0.0000 0.0000 clock core (rise edge) 0.0000 0.0000 clock network delay (ideal) 0.0000 0.0000 ^ _19330_/CK (DFFR_X1) 0.1023 0.1023 v _19330_/Q (DFFR_X1) 0.7378 0.8400 ^ _10895_/ZN (NOR2_X1) 0.9920 1.8320 v _10928_/ZN (NOR3_X1) 0.2040 2.0360 ^ _13645_/ZN (AOI222_X1) 0.0301 2.0661 v _13646_/ZN (NAND2_X1) 0.0546 2.1207 ^ _13651_/ZN (AOI21_X1) 0.5313 2.6520 ^ _13669_/ZN (AND2_X1) 0.0579 2.7099 v _14972_/ZN (AOI222_X1) 0.0452 2.7551 ^ _14973_/ZN (NAND2_X1) 0.0174 2.7725 v _14974_/ZN (AOI221_X1) 0.0390 2.8116 ^ _14977_/ZN (NAND3_X1) 0.0175 2.8291 v _14978_/ZN (AOI221_X1) 0.0831 2.9122 ^ _14989_/ZN (OAI221_X1) 0.0247 2.9368 v _14990_/ZN (AOI21_X1) 0.0536 2.9905 v _14991_/ZN (XNOR2_X1) 0.0254 3.0159 ^ _14992_/ZN (OAI21_X1) 0.0245 3.0404 v _14997_/ZN (OAI21_X1) 0.0407 3.0811 ^ _15045_/ZN (OAI21_X1) 0.0195 3.1006 v _15046_/ZN (AOI21_X1) 0.0397 3.1403 ^ _15047_/ZN (AOI21_X1) 0.0000 3.1403 ^ _19464_/D (DFFR_X1) 3.1403 data arrival time 4.0000 4.0000 clock core (rise edge) 0.0000 4.0000 clock network delay (ideal) -0.0500 3.9500 clock uncertainty 0.0000 3.9500 clock reconvergence pessimism 3.9500 ^ _19464_/CK (DFFR_X1) -0.0381 3.9119 library setup time 3.9119 data required time ------------------------------------------------------------- 3.9119 data required time -3.1403 data arrival time ------------------------------------------------------------- 0.7716 slack (MET) worst slack max 0.736628 core period_min = 3.26 fmax = 306.43