# Lint waivers

Tools: Verilator `--lint-only -Wall` (raw run without waivers, then with the waiver
file) and Yosys `hierarchy -check; proc; opt_clean; check`. Each waiver is limited to
one file and one message pattern in `cv_x1_pro_axi.vlt` (CV-GEMV waiver file under evaluation licence). With the
waivers applied, both Verilator runs report no remaining warning (exit status 0).
Yosys `check` reports 0 problems for both designs without any waiver.

The cores are delivered unmodified; warnings located in core files are waived with the
reason below rather than fixed.

## cv_x1_pro_axi (wrapper + public core `public/forge/source/dut.v`)

| ID | Rule | Location | Justification |
|---|---|---|---|
| W1 | DECLFILENAME | `public/forge/source/dut.v` | The published core file is named `dut.v`; module `cv_x1_pro_subsystem` is unchanged. |
| W2 | UNUSEDSIGNAL | `s_axil_awaddr[1:0]`, `s_axil_araddr[1:0]` | AXI4-Lite transfers are full width; the byte offset is ignored by design (register map, access policy). |
| W3 | UNUSEDSIGNAL | `s_axil_awprot`, `s_axil_arprot` | Protection attributes are accepted and ignored; all accesses are treated alike. |

## cv_gemv_axi (wrapper + `ip/cv_gemv/{core,memory,device}.sv`, ROWS=32 COLS=128 P=8)

| ID | Rule | Location | Justification |
|---|---|---|---|
| G1 | DECLFILENAME | `core.sv`, `memory.sv`, `device.sv` | Research RTL file names differ from module names; files unmodified. |
| G2 | GENUNNAMED | `core.sv` (2) | Unnamed generate blocks in the unmodified core; no functional effect. |
| G3 | WIDTHEXPAND | `core.sv` (2) | Intended sign extension into the 18-bit group sum and the 64-bit row accumulator. |
| G4 | WIDTHTRUNC | `core.sv` (3) | An integer configuration parameter used as a boolean; integer address expressions truncated to the memory address width, only used while `mem_ren` is asserted (address in range). |
| G5 | WIDTHEXPAND | `device.sv` (1) | Unsigned widening of `result_addr` in a comparison against `ROWS/P`. |
| G6 | UNUSEDSIGNAL | `device.sv`: `read_count`, `stall_count` | The device computes these counters but does not export them (see guide, "not done"). |
| G7 | UNUSEDSIGNAL | wrapper: `s_axil_awaddr[1:0]`, `s_axil_araddr[1:0]`, `s_axil_awprot`, `s_axil_arprot` | As W2/W3. |
| G8 | UNUSEDSIGNAL | wrapper: `dev_result_rd_valid` | The wrapper issues a result read only when the device must accept it (`result_valid`, no command start, block < ROWS/P), so the acknowledge is redundant. |
| G9 | SYNCASYNCNET | wrapper port `aresetn` | The unmodified device uses `rst_n` as asynchronous reset and as a synchronous qualifier (result-memory write enable, configuration ready). Covered by the RDC report: reset release must be synchronous to `aclk`. |