# public copy: one implementation parameter and per-command cycle values are redacted; full log under evaluation licence (sha256 f1743c31598eabb87d8d980afe70645c6ca5110fb0abf7c2d1aa33f3bf208ab1)
# gen_gemv_vectors ROWS=896 COLS=4864 P=8 seed=20261106 commands=5 rows_checked=4480 saturated_rows=224
# iverilog -g2012 -s tb_cv_gemv_axi -Ptb_cv_gemv_axi.ROWS=896 -Ptb_cv_gemv_axi.COLS=4864 -Ptb_cv_gemv_axi.P=8 ip/cv_gemv/core.sv ip/cv_gemv/memory.sv ip/cv_gemv/device.sv integration/rtl/cv_gemv_axi.sv integration/tb/common/axil_monitor.sv integration/tb/common/axis_monitor.sv integration/tb/gemv/tb_cv_gemv_axi.sv; vvp -n gemv_896x4864_p8.vvp +seed=1 +vec=vec_896x4864_p8
tb_cv_gemv_axi simulator=icarus seed=1 ROWS=896 COLS=4864 P=8 commands=5
[1630000] E1/E2 register tests done
[2710000] E3 load-port error tests done
[12778580000] command 0 done: cycle count matched, 896 rows checked twice
[12794590000] reset applied: during command execution
[13184440000] command 1 done: cycle count matched, 896 rows checked twice
[52197500000] command 2 done: cycle count matched, 896 rows checked twice
[52345600000] command 3 done: cycle count matched, 896 rows checked twice
[58853530000] command 4 done: cycle count matched, 896 rows checked twice
SUMMARY tb_errors=0 monitor_errors=0
SUMMARY checks: commands=5 cycle_counts_matched=5 rows_via_axi4lite=4480 rows_via_axi4stream=5376 register_reads_compared=5188 write_responses_compared=657
SUMMARY axi4lite: writes=657 (OKAY 636, SLVERR 21) reads=5188 (OKAY 5169, SLVERR 19)
SUMMARY axi4lite timing: last_of_AW_W_handshake_to_B_handshake_min_cycles=2 AR_to_R_handshake_min_cycles=1 min_cycles_between_AW_handshakes=2 min_cycles_between_AR_handshakes=2
SUMMARY axi4lite ordering: aw_before_w=169 w_before_aw=64 same_cycle=424 back_to_back_aw=17 back_to_back_ar=3865
SUMMARY axi4stream: load_beats=1794898 load_back_to_back=991968 load_stall_cycles_while_busy=68880 load_stall_cycles_while_start_pending=1 result_beats=5376 result_stall_cycles=5807 m_tready_midcycle_toggles_checked=1554696 memory_writes_while_busy=0
SUMMARY timing: start_write_to_device_start_cycles min=1 max=1; irq_rise_minus_(start+CYCLES) min=3 max=3; result_stream_896_rows_always_ready_cycles=1008; load_stall_cycles_while_idle=0
RESULT: PASS
integration/tb/gemv/tb_cv_gemv_axi.sv:604: $finish called at 58853630000 (1ps)