{
 "what": "The two tuned VTA comparator rows (PROBLEM.md / RULES.md, dated addition of 2026-11-07 03:42): the three changes from r9 and r10 that VTA's structure has (VTA's combinational dot-product adder tree is unchanged). Pipeline stages, valid-result latency, interface and results are unchanged; these files show the edits and the checks.",
 "changes": [
  "the two accumulator pipe registers (2 x 32 bits per row) load every cycle; they are read only under the pipe's valid flags",
  "exact widths at VTA's interface: product 13 bits (VTA: 14), adder tree 14/15/16 bits (VTA: 15/16/17)",
  "radix-4 Booth recoding of the 5-bit weight in each MAC: 3 partial products instead of 5"
 ],
 "rows": {
  "vta8_tuned": {
   "source": "studies/compare/rtl/vta_mvm_port_tuned.v",
   "edited_from": "studies/compare/rtl/vta_mvm_port.v",
   "diff": "hand-port.diff",
   "lines_added": 27,
   "lines_removed": 4,
   "sha256": "b4f3f0fcac911139e99e24d616290c1824508d28354aeb0daac12bf9bf139169",
   "sha256_original": "f6f204c916817ee78fe6f2a849f57467a88e1fef3c1cf6bcc4df48c54192ed4c"
  },
  "vta8_official_tuned": {
   "source": "studies/compare/vta/tuned/w5/MatrixVectorMultiplication.v",
   "edited_from": "studies/compare/vta/generated/w5/MatrixVectorMultiplication.v (generated from the unchanged Chisel source)",
   "diff": "generated-module.diff",
   "lines_added": 85,
   "lines_removed": 70,
   "sha256": "f6475cb2e722aa757f047f7060971a18aa2581213711a7e9f8e42ca9f916ae33",
   "sha256_original": "d93d039e17c7d89c95736bb1d0e2585919ad56ff9ef64251397a0d1275b1c93f"
  }
 },
 "checks": {
  "lockstep": {
   "what": "each original against its tuned copy, cycle by cycle (studies/compare/vta/tuned/lockstep.sh, Verilator 5.052): random activations, weights and accumulators, alternate 20,000-cycle stretches of extreme values (weight -16, activations -128 and 127), random valid gaps and io_reset; valid flags compared every cycle, data whenever valid",
   "runs": [
    "hand port seed=1: RESULT lockstep cycles=200000 valid_outputs=170416 mismatches=0 PASS",
    "generated seed=1: RESULT lockstep cycles=200000 valid_outputs=170416 mismatches=0 PASS",
    "hand port seed=2: RESULT lockstep cycles=200000 valid_outputs=170314 mismatches=0 PASS",
    "generated seed=2: RESULT lockstep cycles=200000 valid_outputs=170314 mismatches=0 PASS",
    "hand port seed=3: RESULT lockstep cycles=200000 valid_outputs=170088 mismatches=0 PASS",
    "generated seed=3: RESULT lockstep cycles=200000 valid_outputs=170088 mismatches=0 PASS"
   ],
   "mismatches": 0
  },
  "real_layer": {
   "what": "tb/tb_vta8.sv at RTL: 2 tokens of the real layer, every group partial sum checked against the expected values",
   "runs": [
    "== rtl/vta_mvm_port.v (tb/tb_vta8.sv, RTL, WB 5, 2 tokens of the real layer)",
    "RESULT design=vta8 tokens=2 cycles=136194 group_partials=34048 expected=34048 mismatches=0",
    "== rtl/vta_mvm_port_tuned.v (tb/tb_vta8.sv, RTL, WB 5, 2 tokens of the real layer)",
    "RESULT design=vta8 tokens=2 cycles=136194 group_partials=34048 expected=34048 mismatches=0",
    "== vta/generated/w5/MatrixVectorMultiplication.v (tb/tb_vta8.sv, RTL, WB 5, 2 tokens of the real layer)",
    "RESULT design=vta8_official tokens=2 cycles=136194 group_partials=34048 expected=34048 mismatches=0",
    "== vta/tuned/w5/MatrixVectorMultiplication.v (tb/tb_vta8.sv, RTL, WB 5, 2 tokens of the real layer)",
    "RESULT design=vta8_official tokens=2 cycles=136194 group_partials=34048 expected=34048 mismatches=0"
   ],
   "mismatches": 0,
   "cycles_all_equal": true
  }
 }
}